Lab # 7
Latches
Adrian brown
10/29/98
Abdul Habibala
The purpose of this lab is to become familiar with different lacthes and their truth tables. We wil be simulating four latches on the bread-board and also using the B^2 logic programme. The four latches include an SR latch with NOR gates, an SR latch with NAND gates, an SR latch with contoll input, an a D latch.
For this lab most of the work was done on the proto-board using two chips. the chip contaning the NAND, the chip containing the OR gates, and the inverter chip.
the Proto-board
The NAND chip
# 7400
The OR chip
# 7432
The inverter
# 7404
The first circuit that was simulated was the SR latch with the nor gates.
Schematic and truth table
To construct this latch on the proto-board we used the OR chip and the inverter chip. they were connencted as shown on the diagram below.
Then the SR latch with the NAND gates
Schematic and truth table
To costuct this latch on the proto-board we used the NAND chip. the circuit was setup as shown below.
followed by the SR latch with control input.
Schematic and truth table
The circuit was construted as shown in the diagram below.
Finally the D-latch.
Schematic and truth table
The circuit was consturcted on a proto-board using two NAND chips as shown in hte diagram.
The circuits were first simulated on the B^2 Logic programme and it was proven that all the truth tables that we were given are true. However, when we obtained the results for the simulation on the proto-board they did not match. This was due to the fact that the proto-boards were not working propely.
Altough we were unable to get the proper resuls from the proto board, we did simulate the circuits on the B^2 logic programme, so we do know that they are correct. The Lab was succesful in that we learned more about latches and how they work. It was unsuccesful in that we did get a chance to do the proper breadboarding, and therefore connot be sure if the circuits were connected propely on the Proto -board.